1. Field of the Invention
The present invention relates generally to probe card apparatus for use in testing integrated circuit devices before they are separated from a silicon wafer upon which they are fabricated, and more specifically to a probe head assembly for providing conductive signal paths between an integrated circuit (IC) test equipment and probe tips provided on the bottom surface of a planar substrate and adapted to engage pads on the surface of ICs to be tested.
2. Description of Related Art
It is a common practice in the semiconductor industry to test integrated circuits (ICs) while they are still in the form of die on a semiconductor wafer. Such testing is accomplished through the use of probe card assemblies that connect test equipment to tiny probe pin structures that are caused to engage pads on the dies to be tested. Prior art probe card assemblies for providing signal paths between an integrated circuit tester and input/output (I/O) pads, power input pads and ground pads provided on the surface of ICs formed on a semiconductor wafer are disclosed in U.S. Pat. No. 5,974,662 issued Nov. 2, 1999 to Eldridge et al; U.S. Pat. No. 6,064,213 issued May 16, 2000 to Khandros, et al; U.S. Pat. No. 6,218,910 issued Apr. 17, 2001 to Miller; and U.S. Pat. No. 6,965,244 issued Nov. 15, 2005 to Miller.
As semiconductor devices get smaller and more compact, and the device densities increase, the number of contact pads not only increase in number but also decrease in size. The smaller size of the pads and the smaller pitch (center-to-center spacing between pads) make it more and more difficult to contact the pads to facilitate testing of the devices prior to packaging. Furthermore, as wafer size increases, the value (and cost) of testing the die chips prior to separation and packaging becomes greater. With each generation of device geometry change, it thus gets more difficult to use historical forms of mechanical devices and techniques to make physical contact with the multiplicity of die pads on a wafer. What is needed is a novel configuration, approach and mechanism for making test connections to the die pads prior to wafer disaggregation.
Accordingly it is a principal objective of the present invention to provide a novel wafer test probe apparatus having multiple die pad contactors arrayed in multiple groups with physical dimensions corresponding to the feature sizes of the devices being tested.
Another objective of the present invention is to provide an apparatus of the type described that can be made using the same or similar technology used to make the semiconductor device.
Still another objective of the present invention is to provide a wafer test probe head assembly having wafer pad contactors that do not necessarily depend on elongated flexible contact wires or rods to provide space transformation and the spring forces necessary to insure adequate contact-to-pad compliance.
A still further objective of the present invention is to provide a wafer test probe head assembly that is not pad size limited, tester I/O limited or wire bond limited.
Briefly, a presently preferred embodiment of the present invention is comprised of a wafer probe head assembly including an adapter board having a plurality of first electrical connection terminals distributed around its perimeter for connection to an integrated circuit (IC) tester, a probe card assembly including a space transformer and contactor carrying member formed of one or more layers of electrically non-conductive material and having a generally planar lower surface with an interior region circumscribed by a raised peripheral region, a plurality of wafer pad contactors formed on the planar lower surface within the interior region, a plurality of electrically conductive circuit traces formed on or above the planar lower surface and extending outwardly from ohmic engagement with the contactors to second electrical connection terminals formed on or above the peripheral region, suspension means for resiliently suspending the probe card assembly from the adapter board, and a plurality of conductors for electrically connecting the first terminals to the second terminals, such that when connected to a tester, and the probe head assembly is positioned above one or more wafer die to be tested, and when the contactors are aligned with and caused to engage the contact pads of the die, a test of one or more of the die on the wafer can be conducted.
A feature of the present invention includes a space transformer and contactor carrying assembly comprised of a space transforming layer having a first set of peripheral dimensions and affixed to and/or formed integral with a contactor carrying layer having a second set of dimensions less than the first set so as to provide a stepped perimeter around the contactor carrying layer. The stepped perimeter permits attachment of signal conductors to the circuit traces in a manner such that they do not interfere with the engagement between contactors and the die pads.
Another feature of the present invention includes contactors that are rigidly attached to the conductive traces and have pad engaging tips that lie with a common plane to engage the wafer pads as a wafer under test is raised into engagement with the probe head assembly.
An alternative embodiment of the present invention includes contactors that are attached to the conductive traces by resilient structures that enable a small degree of additional closing motion between the contactor carrying layer and the wafer to insure engagement between the contactors and non-planar wafer pads as a wafer under test is raised into engagement with the probe head assembly.
An important advantage of the present invention is that it permits substantially exact spatial correspondence between an extremely large number of contactors and die pads.
Another advantage of the present invention is that it allows the use of several board layers to array circuit traces extending from interiorly mounted wafer pad contactors to outboard connection terminals.
Still another advantage of the present invention is that it can be fabricated using existing photo-lithographic equipment, existing Computed Numerical Control (CNC) equipment, and existing wire bonding equipment.
These and other objects and advantages of the present invention will no doubt become apparent to those skilled in the art after a review of the following detailed description of the preferred embodiments illustrated in the several figures of the drawing.